PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Casse, Mikaël"

Author of the publication

copydeleteadd this publication to your clipboard
Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs.

, , , , , , , , , , , , , , , , , , , , , , , , , , and . ESSDERC, page 106-109. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Casse, Mikaël
add a person with the name Casse, Mikaël
 

Other publications of authors with the same name

Study of carrier transport in strained and unstrained SOI tri-gate and omega-gate Si-nanowire MOSFETs., , , , , , and . ESSDERC, page 73-76. IEEE, (2012)Precise EOT regrowth extraction enabling performance analysis of low temperature extension first devices., , , , , , , , , and 5 other author(s). ESSDERC, page 144-147. IEEE, (2017)Performance & reliability of 3D architectures (πfet, Finfet, Ωfet)., , , , , , , , , and . IRPS, page 6. IEEE, (2018)Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model., , , , , , , and . ESSDERC, page 210-213. IEEE, (2015)Drain current model for short-channel triple gate junctionless nanowire transistors., , , , , , , and . Microelectronics Reliability, (2016)Process dependence of BTI reliability in advanced HK MG stacks., , , , , , , and . Microelectronics Reliability, 49 (9-11): 982-988 (2009)Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs., , , , , , , , , and 17 other author(s). ESSDERC, page 106-109. IEEE, (2014)Influence of device scaling on low-frequency noise in SOI tri-gate N- and p-type Si nanowire MOSFETs., , , , , , and . ESSDERC, page 300-303. IEEE, (2013)Analog performance of strained SOI nanowires down to 10K., , , , , , and . ESSDERC, page 222-225. IEEE, (2016)Low-temperature transport characteristics in SOI and sSOI nanowires down to 8nm width: Evidence of IDS and mobility oscillations., , , , , , , , , and 3 other author(s). ESSDERC, page 198-201. IEEE, (2013)