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Ultra-Thin Body and Buried Oxide (UTBB) FDSOI Technology with Low Variability and Power Management Capability for 22 nm Node and Below., , , , , , , , , and . J. Low Power Electronics, 8 (1): 125-132 (2012)Multibranch mobility characterization: Evidence of carrier mobility enhancement by back-gate biasing in FD-SOI MOSFET., , , , , , , , and . ESSDERC, page 209-212. IEEE, (2012)Guidelines for intermediate back end of line (BEOL) for 3D sequential integration., , , , , , , , , and 18 other author(s). ESSDERC, page 252-255. IEEE, (2017)Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs., , , , , , , , , and 17 other author(s). ESSDERC, page 106-109. IEEE, (2014)Opportunities brought by sequential 3D CoolCube™ integration., , , , , , , , , and 11 other author(s). ESSDERC, page 226-229. IEEE, (2016)Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration., , , , , , , , and . ESSDERC, page 127-130. IEEE, (2016)A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit., , , , , , , , and . ICICDT, page 141-144. IEEE, (2018)Impact of intermediate BEOL technology on standard cell performances of 3D VLSI., , , , , , , , , and 3 other author(s). ESSDERC, page 218-221. IEEE, (2016)CMOS VT characterization by capacitance measurements in FDSOI PIN gated diodes., , , , , and . ESSDERC, page 405-408. IEEE, (2014)Variability of planar Ultra-Thin Body and Buried oxide (UTBB) FDSOI MOSFETs., , , , , and . ICICDT, page 1-4. IEEE, (2014)