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Disambiguation of "Ritzenthaler, Romain"

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Assessment of SiGe quantum well transistors for DRAM peripheral applications.

, , , , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)

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Other publications of authors with the same name

Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Towards high performance sub-10nm finW bulk FinFET technology., , , , , , , , , and 10 other author(s). ESSDERC, page 131-134. IEEE, (2016)Off-state stress degradation mechanism on advanced p-MOSFETs., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors., , , , , , , , , and 8 other author(s). ESSDERC, page 190-193. IEEE, (2013)Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks., , , , , , , , , and 2 other author(s). ESSDERC, page 242-245. IEEE, (2012)Assessment of SiGe quantum well transistors for DRAM peripheral applications., , , , , , , , , and 1 other author(s). ICICDT, page 1-4. IEEE, (2015)STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process., , , , , , , , and . ESSDERC, page 159-162. IEEE, (2013)Impact of Off State Stress on advanced high-K metal gate NMOSFETs., , , , , , and . ESSDERC, page 365-368. IEEE, (2014)I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration., , , , , , , , , and 2 other author(s). ICICDT, page 1-4. IEEE, (2015)NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures., , , , , , , , , and . IRPS, page 2. IEEE, (2015)