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Characterization and design for variability and reliability., , and . CICC, page 341-346. IEEE, (2008)A Scheme for On-Chip Timing Characterization., , , and . VTS, page 24-29. IEEE Computer Society, (2006)A fast hybrid carry-lookahead/carry-select adder design., , and . ACM Great Lakes Symposium on VLSI, page 149-152. ACM, (2001)On-Chip Delay Measurement Based Response Analysis for Timing Characterization., , , , , and . J. Electronic Testing, 26 (6): 599-619 (2010)Enhanced Leakage Reduction Techniques Using Intermediate Strength Power Gating., , , and . IEEE Trans. VLSI Syst., 15 (11): 1215-1224 (2007)A Low-Overhead Virtual Rail Technique for SRAM Leakage Power Reduction., , , , and . ICCD, page 574-584. IEEE Computer Society, (2005)An on-chip dual supply charge pump system for 45nm PD SOI eDRAM., , , , , , , , , and 3 other author(s). ESSCIRC, page 66-69. IEEE, (2008)Circuit design techniques for a gigahertz integer microprocessor., and . ICCD, page 11-16. (1998)Transforming memory systems: Optimizing for client value on emerging workloads.. VLSI-DAT, page 1-2. IEEE, (2012)Statistical yield analysis of silicon-on-insulator embedded DRAM., , , , , , , and . ISQED, page 190-194. IEEE Computer Society, (2009)