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Cell Processor Low-Power Design Methodology., , , , , , , and . IEEE Micro, 25 (6): 71-78 (2005)SLS: An Advanced Symbolic Layout System for Bipolar and FET Design.. IEEE Trans. on CAD of Integrated Circuits and Systems, 5 (4): 450-458 (1986)Design methodology for the IBM POWER7 microprocessor., , , , , , , , , and 15 other author(s). IBM J. Res. Dev., 55 (3): 9 (2011)A cycle accurate power estimation tool., , , and . ASP-DAC, page 867-870. IEEE, (2006)Designing for a gigahertz [guTS integer processor]., , , , , , , and . IEEE Micro, 18 (3): 66-74 (1998)Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor., , , , , , , , , and 13 other author(s). ASP-DAC, page 871-878. IEEE, (2006)Cell Broadband Engine Processor Design Methodology., , , , , , , , and . CICC, page 711-716. IEEE, (2007)The design methodology and implementation of a first-generation CELL processor: a multi-core SoC., , , , , , , , , and 8 other author(s). CICC, page 45-49. IEEE, (2005)Design methodology for a 1.0 GHz microprocessor., , , , , , , , , and 5 other author(s). ICCD, page 17-23. (1998)IBM POWER8 circuit design and energy optimization., , , , , , , , , and 13 other author(s). IBM Journal of Research and Development, (2015)