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Disambiguation of "Agarwal, Kanak"

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A Design Model for Random Process Variability.

, , , , and . ISQED, page 734-737. IEEE Computer Society, (2008)

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Nivedita Agarwal

 

Other publications of authors with the same name

Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization., , , , , and . ISQED, page 284-290. IEEE Computer Society, (2005)REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variations., , , , and . ICCAD, page 170-177. IEEE Computer Society, (2011)Design-patterning co-optimization of SRAM robustness for double patterning lithography., , and . ASP-DAC, page 713-718. IEEE, (2012)A library compatible driver output model for on-chip RLC transmission lines., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (1): 128-136 (2004)Statistical modeling of cross-coupling effects in VLSI interconnects., , , and . ASP-DAC, page 503-506. ACM Press, (2005)Active learning framework for post-silicon variation extraction and test cost reduction., , , and . ICCAD, page 508-515. IEEE, (2010)Leakage power reduction using stress-enhanced layouts., , , , and . DAC, page 912-917. ACM, (2008)Dynamic Power Management by Combination of Dual Static Supply Voltages., and . ISQED, page 85-92. IEEE Computer Society, (2007)Low-latency Network Monitoring via Oversubscribed Port Mirroring., , , , , , , and . ONS, USENIX Association, (2014)A simple metric for slew rate of RC circuits based on two circuit moments., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (9): 1346-1354 (2004)