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Disambiguation of "Devgan, Anirudh"

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Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization.

, , , , , and . ISQED, page 284-290. IEEE Computer Society, (2005)

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Other publications of authors with the same name

Timing Analysis and Optimization: From Devices to Systems (Abstract of Embedded Tutorial)., and . ASP-DAC, page 345. IEEE, (1998)An "Effective" Capacitance Based Delay Metric for RC Interconnect., , and . ICCAD, page 229-234. IEEE Computer Society, (2000)Design of sub-90nm Circuits and Design Methodologies., , , , and . ISQED, page 3-4. IEEE Computer Society, (2005)Transient sensitivity computation in controlled explicit piecewiselinear simulation., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 19 (1): 98-110 (2000)Modeling and Analysis of Parametric Yield under Power and Performance Constraints., , , and . IEEE Design & Test of Computers, 22 (4): 376-385 (2005)Achieving continuous VT performance in a dual VT process., , , and . ASP-DAC, page 393-398. ACM Press, (2005)Sleep transistor sizing using timing criticality and temporal currents., , , and . ASP-DAC, page 1094-1097. ACM Press, (2005)Power Variability and Its Impact on Design., and . VLSI Design, page 679-682. IEEE Computer Society, (2005)Block-based Static Timing Analysis with Uncertainty., and . ICCAD, page 607-614. IEEE Computer Society / ACM, (2003)Efficient coupled noise estimation for on-chip interconnects.. ICCAD, page 147-151. IEEE Computer Society / ACM, (1997)