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Faster-than-at-speed execution of functional programs: An experimental analysis.

P. Bernardi, A. Bosio, G. Natale, A. Guerriero, and F. Venini. VLSI-SoC, page 1-6. IEEE, (2016)

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Di Liu University of Stuttgart

Data for: The silicon vacancy centers in SiC: determination of intrinsic spin dynamics for integrated quantum photonicsD. Liu. Dataset, (2024)Related to: Di Liu, Florian Kaiser, Vladislav Bushmakin, Erik Hesselmeier, Timo Steidl, Takeshi Ohshima, Nguyen Tien Son, Jawad Ul-Hassan, Öney O. Soykal, Jörg Wrachtrup (2023). The silicon vacancy centers in SiC: determination of intrinsic spin dynamics for integrated quantum photonics. arXiv preprint. arXiv: 2307.13648.

Univ. -Prof. Dr. -Ing. Giorgio Cattaneo University of Stuttgart

Luca Di Grazia University of Stuttgart

Roberta Di Bari University of Stuttgart

Martin Diesch University of Stuttgart

Other publications of authors with the same name

On-chip test comparison for protecting confidential data in secure ICs.J. DaRolt, G. Natale, M. Flottes, and B. Rouzeyre. European Test Symposium, page 1. IEEE Computer Society, (2012)Scan Attacks and Countermeasures in Presence of Scan Response Compactors.J. DaRolt, G. Natale, M. Flottes, and B. Rouzeyre. European Test Symposium, page 19-24. IEEE Computer Society, (2011)Faster-than-at-speed execution of functional programs: An experimental analysis.P. Bernardi, A. Bosio, G. Natale, A. Guerriero, and F. Venini. VLSI-SoC, page 1-6. IEEE, (2016)Laser-Induced Fault Simulation.F. Lu, G. Natale, M. Flottes, and B. Rouzeyre. DSD, page 609-614. IEEE Computer Society, (2013)A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic.R. Bastos, G. Natale, M. Flottes, F. Lu, and B. Rouzeyre. J. Electronic Testing, 29 (3): 331-340 (2013)March Test Generation Revealed.A. Benso, A. Bosio, S. Carlo, G. Natale, and P. Prinetto. IEEE Trans. Computers, 57 (12): 1704-1713 (2008)Hardware Trojan prevention using layout-level design approach.P. Ba, P. Manikandan, S. Dupuis, M. Flottes, G. Natale, and B. Rouzeyre. ECCTD, page 1-4. IEEE, (2015)Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview.A. Vallero, S. Tselonis, N. Foutris, M. Kaliorakis, M. Kooli, A. Savino, G. Politano, A. Bosio, G. Natale, D. Gizopoulos and 1 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 1204-1214 (2015)Frontside Versus Backside Laser Injection: A Comparative Study.S. Castro, J. Dutertre, B. Rouzeyre, G. Natale, and M. Flottes. JETC, 13 (1): 6:1-6:15 (2016)SECCS: SECure Context Saving for IoT Devices.E. Valea, M. Silva, G. Natale, M. Flottes, S. Dupuis, and B. Rouzeyre. CoRR, (2019)