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Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview.

, , , , , , , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 1204-1214 (2015)

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Hardware Trojan prevention using layout-level design approach., , , , , and . ECCTD, page 1-4. IEEE, (2015)Laser-Induced Fault Simulation., , , and . DSD, page 609-614. IEEE Computer Society, (2013)On-chip test comparison for protecting confidential data in secure ICs., , , and . European Test Symposium, page 1. IEEE Computer Society, (2012)Scan Attacks and Countermeasures in Presence of Scan Response Compactors., , , and . European Test Symposium, page 19-24. IEEE Computer Society, (2011)March Test Generation Revealed., , , , and . IEEE Trans. Computers, 57 (12): 1704-1713 (2008)A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic., , , , and . J. Electronic Testing, 29 (3): 331-340 (2013)Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview., , , , , , , , , and 1 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 1204-1214 (2015)Frontside Versus Backside Laser Injection: A Comparative Study., , , , and . JETC, 13 (1): 6:1-6:15 (2016)SECCS: SECure Context Saving for IoT Devices., , , , , and . CoRR, (2019)Security primitives (PUF and TRNG) with STT-MRAM., , and . VTS, page 1-4. IEEE Computer Society, (2016)