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Evaluation of via density and low-k Young's modulus influence on mechanical performance of advanced node multi-level Back-End-Of-Line., , , , , and . Microelectronics Reliability, (2016)Reliability challenges for copper low-k dielectrics and copper diffusion barriers., , and . Microelectronics Reliability, 45 (9-11): 1436-1442 (2005)Stress mitigation of 3D-stacking/packaging induced stresses., , , , , , , , and . IRPS, page 4. IEEE, (2018)As-grown donor-like traps in low-k dielectrics and their impact on intrinsic TDDB reliability., , , , , , , , , and 1 other author(s). Microelectronics Reliability, 54 (9-10): 1675-1679 (2014)Insights into metal drift induced failure in MOL and BEOL., , , , , , and . IRPS, page 3. IEEE, (2018)Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies., , , , , , , , , and 6 other author(s). ESSDERC, page 102-105. IEEE, (2014)Constant voltage electromigration for advanced BEOL copper interconnects., , , , , , , and . IRPS, page 2. IEEE, (2015)Design considerations for the mechanical integrity of airgaps in nano-interconnects under chip-package interaction; a numerical investigation., , , , , and . Microelectronics Reliability, (2016)Low-Frequency Noise Measurements to Characterize Cu-Electromigration Down to 44nm Metal Pitch., , , , and . IRPS, page 1-6. IEEE, (2019)Logic Scaling Options for the Next 10 Years: From FinFet to CFET, from Dual Damascene to Semi Damascene.. FPGA, page 49. ACM, (2022)