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Layout Decomposition and Legalization for Double-Patterning Technology., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (2): 202-215 (2013)A Designer's Guide to Subresolution Lithography: Enabling the Impossible to Get to the 14-nm Node [Tutorial]., and . IEEE Design & Test, 30 (3): 70-92 (2013)Application of automated design migration to alternating phase shift mask design., , and . ISPD, page 38-43. ACM, (2001)CAD computation for manufacturability: can we save VLSI technology from itself?, and . ICCAD, page 424-431. ACM / IEEE Computer Society, (2002)Pushing multiple patterning in sub-10nm: are we ready?, , , , and . DAC, page 197:1-197:6. ACM, (2015)TCAD development for lithography resolution enhancement., , , , , and . IBM Journal of Research and Development, 45 (5): 651-666 (2001)Coupling timing objectives with optical proximity correction for improved timing yield., , , , , and . ISQED, page 97-102. IEEE, (2011)Rules vs tools: what's the right way to address IC manufacturing complexity?, , , and . ISPD, page 75-76. ACM, (2007)Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (4): 509-527 (2010)A framework for double patterning-enabled design., , , , , and . ICCAD, page 14-20. IEEE Computer Society, (2011)