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Disambiguation of "Torres, J. Andres"

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A Designer's Guide to Subresolution Lithography: Enabling the Impossible to Get to the 14-nm Node [Tutorial].

, and . IEEE Design & Test, 30 (3): 70-92 (2013)

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Univ. -Prof. Dr. -Ing. Andrés Bruhn University of Stuttgart

Julia Torres University of Stuttgart

Edgar Torres University of Stuttgart

J. K\"astner

J. Schwarz

 

Other publications of authors with the same name

A Designer's Guide to Subresolution Lithography: Enabling the Impossible to Get to the 14-nm Node [Tutorial]., and . IEEE Design & Test, 30 (3): 70-92 (2013)Advanced multi-patterning and hybrid lithography techniques., and . ASP-DAC, page 611-616. IEEE, (2016)DSA-aware multiple patterning for the manufacturing of vias: Connections to graph coloring problems, IP formulations, and numerical experiments., , , and . CoRR, (2019)Litho-Friendly Decomposition Method for Self-Aligned Double Patterning., , and . IEEE Trans. VLSI Syst., 21 (8): 1469-1480 (2013)Combining lithography and Directed Self Assembly for the manufacturing of vias: Connections to graph coloring problems, integer programming formulations, and numerical experiments., , , and . European Journal of Operational Research, 280 (2): 453-468 (2020)High performance lithographic hotspot detection using hierarchically refined machine learning., , , and . ASP-DAC, page 775-780. IEEE, (2011)Rapid layout pattern classification., , , and . ASP-DAC, page 781-786. IEEE, (2011)Self-aligned double patterning (SADP) layout decomposition., , and . ISQED, page 103-109. IEEE, (2011)Litho-Friendly Decomposition Method for Self-Aligned Triple Patterning., , and . IEEE Trans. VLSI Syst., 22 (5): 1170-1174 (2014)High Performance Lithography Hotspot Detection With Successively Refined Pattern Identifications and Machine Learning., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (11): 1621-1634 (2011)