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Disambiguation of "Fojtik, Matthew"

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In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter.

, , , , , , and . ISSCC, page 188-189. IEEE, (2010)

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Matthew Joliffe University of Stuttgart

Ph. D. Matthew Millard University of Stuttgart

 

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A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 48 (3): 801-813 (2013)In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter., , , , , , and . ISSCC, page 188-189. IEEE, (2010)Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive Clocks., , , , , and . ASYNC, page 75-82. IEEE Computer Society, (2016)A modular digital VLSI flow for high-productivity SoC design., , , , , , , , , and 5 other author(s). DAC, page 72:1-72:6. ACM, (2018)A 2.98nW bandgap voltage reference using a self-tuning low leakage sample and hold., , , and . VLSIC, page 200-201. IEEE, (2012)Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores., , , , , , , , , and 5 other author(s). ISSCC, page 190-192. IEEE, (2012)Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects., , , , , , , , , and 6 other author(s). CICC, page 1-8. IEEE, (2018)Centip3De: A 64-Core, 3D Stacked Near-Threshold System., , , , , , , , , and 5 other author(s). IEEE Micro, 33 (2): 8-16 (2013)Centip3De: a many-core prototype exploring 3D integration and near-threshold computing., , , , , , , , , and 5 other author(s). Commun. ACM, 56 (11): 97-104 (2013)A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme., , , , , and . ISCAS, page 69-72. IEEE, (2011)