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Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.

W. Turner, J. Poulton, J. Wilson, X. Chen, S. Tell, M. Fojtik, T. Greer, B. Zimmer, S. Song, N. Nedovic, S. Kudva, S. Sudhakaran, R. Bashirullah, W. Zhao, W. Dally, and C. Gray. CICC, page 1-8. IEEE, (2018)

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John Nixon University of Stuttgart

Isaac Henderson Johnson Jeyakumar University of Stuttgart

David John Cross University of Stuttgart

Tim W{\"{u}}rtele

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Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.W. Turner, J. Poulton, J. Wilson, X. Chen, S. Tell, M. Fojtik, T. Greer, B. Zimmer, S. Song, N. Nedovic and 6 other author(s). CICC, page 1-8. IEEE, (2018)A reverse write assist circuit for SRAM dynamic write VMIN tracking using canary SRAMs.A. Banerjee, M. Sinangil, J. Poulton, C. Gray, and B. Calhoun. ISQED, page 1-8. IEEE, (2014)A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator.J. Poulton, J. Wilson, W. Turner, B. Zimmer, X. Chen, S. Kudva, S. Song, S. Tell, N. Nedovic, W. Zhao and 3 other author(s). J. Solid-State Circuits, 54 (1): 43-54 (2019)A 0.54pJ/b 20Gb/s ground-referenced single-ended short-haul serial link in 28nm CMOS for advanced packaging applications.J. Poulton, W. Dally, X. Chen, J. Eyles, T. Greer, S. Tell, and C. Gray. ISSCC, page 404-405. IEEE, (2013)A 1.17pJ/b 25Gb/s/pin ground-referenced single-ended serial link for off- and on-package communication in 16nm CMOS using a process- and temperature-adaptive voltage regulator.J. Wilson, W. Turner, J. Poulton, B. Zimmer, X. Chen, S. Kudva, S. Song, S. Tell, N. Nedovic, W. Zhao and 3 other author(s). ISSCC, page 276-278. IEEE, (2018)Transmitter equalization for 4-Gbps signaling.W. Dally, and J. Poulton. IEEE Micro, 17 (1): 48-56 (1997)Digital systems engineering.W. Dally, and J. Poulton. Cambridge University Press, (2001)A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications.J. Poulton, W. Dally, X. Chen, J. Eyles, T. Greer, S. Tell, J. Wilson, and C. Gray. J. Solid-State Circuits, 48 (12): 3206-3218 (2013)The design of DNA self-assembled computing circuitry.C. Dwyer, L. Vicci, J. Poulton, D. Erie, R. Superfine, S. Washburn, and R. II. IEEE Trans. VLSI Syst., 12 (11): 1214-1220 (2004)CMOS High-Speed I/Os - Present and Future.M. Lee, W. Dally, R. Farjad-Rad, H. Ng, R. Senthinathan, J. Edmondson, and J. Poulton. ICCD, page 454-461. IEEE Computer Society, (2003)

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Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.

Please choose a person to relate this publication to

John Nixon University of Stuttgart

Isaac Henderson Johnson Jeyakumar University of Stuttgart

David John Cross University of Stuttgart

Tim W{\"{u}}rtele

Tim W{\"{u}}rtele

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Poulton, John W."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.

Please choose a person to relate this publication to

John Nixon University of Stuttgart

Isaac Henderson Johnson Jeyakumar University of Stuttgart

David John Cross University of Stuttgart

Tim W{\"{u}}rtele

Tim W{\"{u}}rtele

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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Chicago
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Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.