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A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator.

, , , , , , , , , , , , and . J. Solid-State Circuits, 54 (1): 43-54 (2019)

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Transmitter equalization for 4-Gbps signaling., and . IEEE Micro, 17 (1): 48-56 (1997)Digital systems engineering., and . Cambridge University Press, (2001)The design of DNA self-assembled computing circuitry., , , , , , and . IEEE Trans. VLSI Syst., 12 (11): 1214-1220 (2004)A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications., , , , , , , and . J. Solid-State Circuits, 48 (12): 3206-3218 (2013)A reverse write assist circuit for SRAM dynamic write VMIN tracking using canary SRAMs., , , , and . ISQED, page 1-8. IEEE, (2014)Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects., , , , , , , , , and 6 other author(s). CICC, page 1-8. IEEE, (2018)A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator., , , , , , , , , and 3 other author(s). J. Solid-State Circuits, 54 (1): 43-54 (2019)A 0.54pJ/b 20Gb/s ground-referenced single-ended short-haul serial link in 28nm CMOS for advanced packaging applications., , , , , , and . ISSCC, page 404-405. IEEE, (2013)A 1.17pJ/b 25Gb/s/pin ground-referenced single-ended serial link for off- and on-package communication in 16nm CMOS using a process- and temperature-adaptive voltage regulator., , , , , , , , , and 3 other author(s). ISSCC, page 276-278. IEEE, (2018)CMOS High-Speed I/Os - Present and Future., , , , , , and . ICCD, page 454-461. IEEE Computer Society, (2003)