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Disambiguation of "Engelke, Piet"

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TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis.

, , , , , and . VLSI Design, page 227-232. IEEE Computer Society, (2009)

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Patrick Pietrantuono University of Stuttgart

 

Other publications of authors with the same name

TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis., , , , , and . VLSI Design, page 227-232. IEEE Computer Society, (2009)Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies., , , , , and . VTS, page 343-348. IEEE Computer Society, (2005)Simulating Resistive-Bridging and Stuck-At Faults., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (10): 2181-2192 (2006)SUPERB: Simulator utilizing parallel evaluation of resistive bridges., , , , , and . ACM Trans. Design Autom. Electr. Syst., 14 (4): 56:1-56:21 (2009)Automatic Test Pattern Generation for Resistive Bridging Faults., , , and . J. Electronic Testing, 22 (1): 61-69 (2006)Automatic Test Pattern Generation for Interconnect Open Defects., , , , , and . VTS, page 181-186. IEEE Computer Society, (2008)Automatic test pattern generation for resistive bridging faults., , , and . European Test Symposium, page 160-165. IEEE Computer Society, (2004)X-masking during logic BIST and its impact on defect coverage., , , , , , , and . IEEE Trans. VLSI Syst., 14 (2): 193-202 (2006)Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures., , , , , , , , and . DAC, page 96:1-96:9. ACM, (2014)The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults., , , , and . VTS, page 171-178. IEEE Computer Society, (2004)