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Automatic Test Pattern Generation for Interconnect Open Defects.

S. Spinner, I. Polian, P. Engelke, B. Becker, M. Keim, and W. Cheng. VTS, page 181-186. IEEE Computer Society, (2008)

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Jens Keim University of Stuttgart

GALÆXI Validation: Taylor-Green VortexM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.

GALÆXI Validation: Taylor-Green VortexM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.GALÆXI ScalingM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.GALÆXI Verification: Convergence TestsM. Kurz, D. Kempf, M. Blind, P. Kopper, P. Offenhäuser, A. Schwarz, S. Starr, J. Keim, and A. Beck. Dataset, (2024)Related to: Kempf, Daniel et al. “GALÆXI: Solving complex compressible flows with high-order discontinuous Galerkin methods on accelerator-based systems.” (2024). arXiv: 2404.12703.

Leon Keim University of Stuttgart

Hon. -Prof. Dr. Bernhard Keimer University of Stuttgart

Martin Baumann

Martin Schwartz University of Stuttgart

Other publications of authors with the same name

A case study: Leverage IEEE 1687 based method to automate modeling, verification, and test access for embedded instruments in a server processor.T. Payakapan, S. Kan, K. Pham, K. Yang, J. Cote, M. Keim, and J. Dworak. ITC, page 1-10. IEEE, (2015)Re-using chip level DFT at board level.X. Gu, J. Rearick, B. Eklow, M. Keim, J. Qian, A. Jutman, K. Chakrabarty, and E. Larsson. European Test Symposium, page 1. IEEE Computer Society, (2012)Test Generation for (Sequential) Multi-Valued Logic Networks based on Genetic Algorithm.M. Keim, N. Drechsler, R. Drechsler, and B. Becker. ISMVL, page 215-221. IEEE Computer Society, (1998)Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits.M. Keim, N. Drechsler, and B. Becker. ASP-DAC, page 315-318. IEEE Computer Society, (1999)Symbolic methods for testing digital circuits.M. Keim. University of Freiburg, Freiburg im Breisgau, Germany, (2003)Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model.S. Hillebrecht, I. Polian, P. Engelke, B. Becker, M. Keim, and W. Cheng. ITC, page 1-10. IEEE Computer Society, (2008)Symbolic Fault Simulation for Sequential Circuits and the Multiple Observation Time Test Strategy.R. Krieger, B. Becker, and M. Keim. DAC, page 339-344. ACM Press, (1995)Adapting an industrial memory BIST solution for testing CAMs.J. Abraham, U. Garg, G. Colón-Bonet, R. Sharma, C. Di, B. Nadeau-Dostie, E. Racine, and M. Keim. ITC-Asia, page 112-117. IEEE, (2017)Silicon Evaluation of Static Alternative Fault Models.C. Schuermyer, J. Pangilinan, J. Jahangiri, M. Keim, J. Rajski, and B. Benware. VTS, page 265-270. IEEE Computer Society, (2007)Polynomial Formal Verification of Multipliers.M. Keim, M. Martin, B. Becker, R. Drechsler, and P. Molitor. VTS, page 150-157. IEEE Computer Society, (1997)