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Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction.

M. Fojtik, D. Fick, Y. Kim, N. Pinckney, D. Harris, D. Blaauw, and D. Sylvester. J. Solid-State Circuits, 48 (1): 66-81 (2013)

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T. Ertl

Dr. Marie Davidova University of Stuttgart

T. Vietor

T. Maier

Other publications of authors with the same name

Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias.S. Kulkarni, D. Sylvester, and D. Blaauw. IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (3): 481-494 (2008)Derivation of signal flow for switch-level simulation.D. Blaauw, D. Saab, J. Long, and J. Abraham. EURO-DAC, page 301-305. IEEE Computer Society, (1990)A Variation-Tolerant Sub-200 mV 6-T Subthreshold SRAM.B. Zhai, S. Hanson, D. Blaauw, and D. Sylvester. J. Solid-State Circuits, 43 (10): 2338-2348 (2008)RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance.S. Das, C. Tokunaga, S. Pant, W. Ma, S. Kalaiselvan, K. Lai, D. Bull, and D. Blaauw. J. Solid-State Circuits, 44 (1): 32-48 (2009)Alignment-Independent Chip-to-Chip Communication for Sensor Applications Using Passive Capacitive Signaling.Y. Lin, D. Sylvester, and D. Blaauw. J. Solid-State Circuits, 44 (4): 1156-1166 (2009)A 42 nJ/Conversion On-Demand State-of-Charge Indicator for Miniature IoT Li-Ion Batteries.J. Jeong, S. Jeong, D. Sylvester, D. Blaauw, and C. Kim. J. Solid-State Circuits, 54 (2): 524-537 (2019)A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells.M. Fojtik, D. Kim, G. Chen, Y. Lin, D. Fick, J. Park, M. Seok, M. Chen, Z. Foo, D. Blaauw and 1 other author(s). J. Solid-State Circuits, 48 (3): 801-813 (2013)Exploring Variability and Performance in a Sub-200-mV Processor.S. Hanson, B. Zhai, M. Seok, B. Cline, K. Zhou, M. Singhal, M. Minuth, J. Olson, L. Nazhandali, T. Austin and 2 other author(s). J. Solid-State Circuits, 43 (4): 881-891 (2008)Bus encoding for total power reduction using a leakage-aware buffer configuration.R. Rao, H. Deogun, D. Blaauw, and D. Sylvester. IEEE Trans. VLSI Syst., 13 (12): 1376-1383 (2005)Design and Evaluation of Confidence-Driven Error-Resilient Systems.C. Chen, D. Blaauw, D. Sylvester, and Z. Zhang. IEEE Trans. VLSI Syst., 22 (8): 1727-1737 (2014)

PUMA

Disambiguation of "Blaauw, David T."

Please choose a person to relate this publication to

T. Ertl

Dr. Marie Davidova University of Stuttgart

T. Vietor

T. Maier

T. Maier

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Blaauw, David T."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction.

Please choose a person to relate this publication to

T. Ertl

Dr. Marie Davidova University of Stuttgart

T. Vietor

T. Maier

T. Maier

Other publications of authors with the same name

Disambiguation