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Is aproximate computing suitable for selective hardening of arithmetic circuits?

B. Deveautour, A. Virazel, P. Girard, S. Pravossoudovitch, and V. Gherman. DTIS, page 1-6. IEEE, (2018)

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Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation.A. Todri, A. Bosio, L. Dilillo, P. Girard, and A. Virazel. IEEE Trans. VLSI Syst., 21 (5): 958-970 (2013)Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test.S. Borri, M. Hage-Hassan, L. Dilillo, P. Girard, S. Pravossoudovitch, and A. Virazel. J. Electronic Testing, 21 (2): 169-179 (2005)A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction.N. Badereddine, Z. Wang, P. Girard, K. Chakrabarty, A. Virazel, S. Pravossoudovitch, and C. Landrault. J. Electronic Testing, 24 (4): 353-364 (2008)Intra-Cell Defects Diagnosis.Z. Sun, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovich, A. Virazel, and E. Auvray. J. Electronic Testing, 30 (5): 541-555 (2014)Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles.N. Badereddine, P. Girard, S. Pravossoudovitch, A. Virazel, and C. Landrault. VLSI-SoC, volume 240 of IFIP, page 267-281. Springer, (2005)Failure Analysis and Test Solutions for Low-Power SRAMs.L. Zordan, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, A. Todri, A. Virazel, and N. Badereddine. Asian Test Symposium, page 459-460. IEEE Computer Society, (2011)Comprehensive bridging fault diagnosis based on the SLAT paradigm.Y. Benabboud, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, L. Bouzaida, and I. Izaute. DDECS, page 264-269. IEEE Computer Society, (2009)On Using Efficient Test Sequences for BIST.R. David, P. Girard, C. Landrault, S. Pravossoudovitch, and A. Virazel. VTS, page 145-152. IEEE Computer Society, (2002)Advanced test methods for SRAMs.A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, and A. Virazel. VTS, page 300-301. IEEE Computer Society, (2012)Un-Restored Destructive Write Faults Due to Resistive-Open Defects in the Write Driver of SRAMs.A. Ney, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel, and M. Bastian. VTS, page 361-368. IEEE Computer Society, (2007)

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Is aproximate computing suitable for selective hardening of arithmetic circuits?

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Is aproximate computing suitable for selective hardening of arithmetic circuits?

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Is aproximate computing suitable for selective hardening of arithmetic circuits?