Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Is aproximate computing suitable for selective hardening of arithmetic circuits?

B. Deveautour, A. Virazel, P. Girard, S. Pravossoudovitch, and V. Gherman. DTIS, page 1-6. IEEE, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Virazel, Arnaud

add a person with the name Virazel, Arnaud

Other publications of authors with the same name

Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution.L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S. Borri, and M. Hage-Hassan. Asian Test Symposium, page 266-271. IEEE Computer Society, (2004)A Mixed Approach for Unified Logic Diagnosis.A. Rousset, A. Bosio, P. Girard, C. Landrault, S. Pravossoudovitch, and A. Virazel. DDECS, page 239-242. IEEE Computer Society, (2007)Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture.I. Wali, A. Virazel, A. Bosio, P. Girard, and M. Reorda. IOLTS, page 89-94. IEEE, (2015)Delay Fault Diagnosis in Sequential Circuits.Y. Benabboud, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, and O. Riewer. Asian Test Symposium, page 355-360. IEEE Computer Society, (2009)A built-in scheme for testing and repairing voltage regulators of low-power srams.L. Zordan, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, and N. Badereddine. VTS, page 1-6. IEEE Computer Society, (2013)Effect-cause intra-cell diagnosis at transistor level.Z. Sun, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, and E. Auvray. ISQED, page 460-467. IEEE, (2013)Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing.N. Badereddine, P. Girard, S. Pravossoudovitch, C. Landrault, A. Virazel, and H. Wunderlich. VLSI-SoC, page 403-408. IEEE, (2006)An effective hybrid fault-tolerant architecture for pipelined cores.I. Wali, A. Virazel, A. Bosio, L. Dilillo, and P. Girard. ETS, page 1-6. IEEE, (2015)Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories.L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S. Borri, and M. Hage-Hassan. J. Electronic Testing, 21 (5): 551-561 (2005)A Scan-BIST Structure to Test Delay Faults in Sequential Circuits.P. Girard, C. Landrault, V. Moreda, S. Pravossoudovitch, and A. Virazel. J. Electronic Testing, 14 (1-2): 95-102 (1999)

PUMA

Disambiguation of "Virazel, Arnaud"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Is aproximate computing suitable for selective hardening of arithmetic circuits?

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Virazel, Arnaud"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Is aproximate computing suitable for selective hardening of arithmetic circuits?

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Is aproximate computing suitable for selective hardening of arithmetic circuits?