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Disambiguation of "Nazemi, Ali"

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Compounding effects of human activities and climatic changes on surface water availability in Iran

, , , , , , , , , , , , , , , , , , , and . Climatic Change, 152 (3-4): 379--391 (November 2018)
DOI: 10.1007/s10584-018-2336-6

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Ali Salehi University of Stuttgart

Layal Ali University of Stuttgart

Dr. -Ing. Ali Jamshed University of Stuttgart

Ali Hangi University of Stuttgart

Ali Nakhaee University of Stuttgart

 

Other publications of authors with the same name

3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS., , , , , , , , and . ISSCC, page 58-59. IEEE, (2016)29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 484-485. IEEE, (2017)A Sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 nm CMOS for high-speed serial communication applications., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2013)A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission., , , , , , , , , and 5 other author(s). ISSCC, page 330-332. IEEE, (2012)A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 47 (12): 3249-3260 (2012)A 90 nm CMOS DSP MLSD Transceiver With Integrated AFE for Electronic Dispersion Compensation of Multimode Optical Fibers at 10 Gb/s., , , , , , , , , and 13 other author(s). J. Solid-State Circuits, 43 (12): 2939-2957 (2008)Compounding effects of human activities and climatic changes on surface water availability in Iran, , , , , , , , , and 10 other author(s). Climatic Change, 152 (3-4): 379-391 (2019)A 40 nm CMOS 195 mW/55 mW Dual-Path Receiver AFE for Multi-Standard 8.5-11.5 Gb/s Serial Links., , , , , , , , and . J. Solid-State Circuits, 50 (2): 426-439 (2015)A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS., , , , , , , , and . ISSCC, page 34-35. IEEE, (2013)3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)