PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "De, Vivek K."

Author of the publication

copydeleteadd this publication to your clipboard
Low-voltage-swing monolithic dc-dc conversion.

, , , and . IEEE Trans. on Circuits and Systems, 51-II (5): 241-248 (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

K. Stahl

K. Gaiser

K. Lindow

Nithyasree Vivekanandham Pushpalatha University of Stuttgart

Grzegorz K. Karch

 

Other publications of authors with the same name

All-Digital Circuit-Level Dynamic Variation Monitor for Silicon Debug and Adaptive Clock Control., , , , , , , , , and . IEEE Trans. on Circuits and Systems, 58-I (9): 2017-2025 (2011)Energy-Efficient and Metastability-Immune Timing-Error Detection and Instruction-Replay-Based Recovery Circuits for Dynamic-Variation Tolerance., , , , , , , and . ISSCC, page 402-403. IEEE, (2008)A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 46 (1): 194-208 (2011)2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 44 (1): 174-185 (2009)Application-Specific Cross-Layer Optimization Based on Predictive Variable-Latency VLSI Design., , , , , and . JETC, 12 (3): 21:1-21:19 (2015)A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling., , , , , , , , , and 6 other author(s). J. Solid-State Circuits, 46 (1): 173-183 (2011)Accurate Estimation of SRAM Dynamic Stability., , , , , and . IEEE Trans. VLSI Syst., 16 (12): 1639-1647 (2008)Adaptive and Resilient Circuits for Dynamic Variation Tolerance., , , , and . IEEE Design & Test, 30 (6): 8-17 (2013)Low-voltage-swing monolithic dc-dc conversion., , , and . IEEE Trans. on Circuits and Systems, 51-II (5): 241-248 (2004)A 22 nm All-Digital Dynamically Adaptive Clock Distribution for Supply Voltage Droop Tolerance., , , , and . J. Solid-State Circuits, 48 (4): 907-916 (2013)