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Disambiguation of "Borkar, Shekhar"

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Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache.

, , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (2): 91-95 (2002)

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Extreme Energy Efficiency by Near Threshold Voltage Operation.. Near Threshold Computing, Springer, (2016)Tackling variability and reliability challenges.. IEEE Design & Test of Computers, 23 (6): 520 (2006)Design challenges of technology scaling.. IEEE Micro, 19 (4): 23-29 (1999)Future of on-chip interconnection architectures., and . ISLPED, page 122. ACM, (2007)Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies., , , , and . ISLPED, page 122-127. ACM, (2003)Scaling of stack effect and its application for leakage reduction., , , , and . ISLPED, page 195-200. ACM, (2001)Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (2): 91-95 (2002)A 340 mV-to-0.9 V 20.2 Tb/s Source-Synchronous Hybrid Packet/Circuit-Switched 16 × 16 Network-on-Chip in 22 nm Tri-Gate CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 50 (1): 59-67 (2015)A 1.9Gb/s 358mW 16-to-256 State Reconfigurable Viterbi Accelerator in 90nm CMOS., , , , and . ISSCC, page 256-600. IEEE, (2007)A 1.45GHz 52-to-162GFLOPS/W variable-precision floating-point fused multiply-add unit with certainty tracking in 32nm CMOS., , , , , , , and . ISSCC, page 182-184. IEEE, (2012)