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Disambiguation of "Stan, Mircea R."

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Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache.

, , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (2): 91-95 (2002)

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R. Koerner

R. Watty

Dipl.-Ing. Marc Riedlinger

An adaptive self-managing platform for cabin management systems, , , and . CEAS Aeronautical Journal, 7 (3): 483--498 (2016)

Nils Rodrigues University of Stuttgart

A Visual Analytics Approach for Word Relevances in Multiple Texts, , , and . (2017)

Reinhard Reichel

Fly-By-Wire for CS23 Aircraft - Core Technology for General Aviation and RPAS, , , , , , , and . (October 2016)
 

Other publications of authors with the same name

Interconnect Lifetime Prediction for Reliability-Aware Systems., , , , and . IEEE Trans. VLSI Syst., 15 (2): 159-172 (2007)Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model., , , , and . IEEE Trans. Computers, 57 (9): 1277-1288 (2008)Temperature-Aware Computer Systems: Opportunities and Challenges., , , , , and . IEEE Micro, 23 (6): 52-61 (2003)Using Intradisk Parallelism to Build Energy-Efficient Storage Systems., , and . IEEE Micro, 29 (1): 50-61 (2009)A new taxonomy for reconfigurable prefix adders., and . ISCAS, page 1227-1230. IEEE, (2012)Relaxing non-volatility for fast and energy-efficient STT-RAM caches., , , , and . HPCA, page 50-61. IEEE Computer Society, (2011)Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management., , and . HPCA, page 17-28. IEEE Computer Society, (2002)Analog VLSI for robot path planning., , , and . VLSI Signal Processing, 8 (1): 61-73 (1994)A Case for Thermal-Aware Floorplanning at the Microarchitectural Level., , , and . J. Instruction-Level Parallelism, (2005)The Selective Pull-Up (SP) Noise Immunity Scheme for Dynamic Circuits., and . DATE, page 1106. IEEE Computer Society, (2002)