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SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.

Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. on Circuits and Systems, 62-I (6): 1538-1545 (2015)

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Dr. phil. Geoffrey Rodoreda University of Stuttgart

Dr. phil. Geoffrey Chanda University of Stuttgart

Other publications of authors with the same name

FinFET based SRAM bitcell design for 32 nm node and below.S. Song, M. Abu-Rahma, and G. Yeap. Microelectronics Journal, 42 (3): 520-526 (2011)Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization.N. Mojumder, S. Song, K. Rim, J. Xu, J. Wang, J. Zhu, M. Vratonjic, K. Lin, M. Saint-Laurent, P. Bassett and 1 other author(s). VLSIC, page 84-. IEEE, (2015)Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology.Y. Yang, H. Jeong, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. on Circuits and Systems, 63-I (7): 1023-1032 (2016)Improved device variability in scaled MOSFETs with deeply retrograde channel profile.J. Woo, P. Chien, F. Yang, S. Song, C. Chidambaram, J. Wang, and G. Yeap. Microelectronics Reliability, 54 (6-7): 1090-1095 (2014)Holistic technology optimization and key enablers for 7nm mobile SoC.S. Song, J. Xu, N. Mojumder, K. Rim, D. Yang, J. Bao, J. Zhu, J. Wang, M. Badaroglu, V. Machkaoutsan and 4 other author(s). VLSIC, page 198-. IEEE, (2015)Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.S. Song, J. Xu, D. Yang, K. Rim, P. Feng, J. Bao, J. Zhu, J. Wang, G. Nallapati, M. Badaroglu and 4 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)Technology-design-manufacturing co-optimization for advanced mobile SoCs.G. Yeap. CICC, page 1-8. IEEE, (2014)Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. VLSI Syst., 23 (11): 2748-2752 (2015)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. on Circuits and Systems, 62-I (6): 1538-1545 (2015)BSIM4-based lateral diode model for LNA co-designed with ESD protection circuit.M. Yang, Y. Du, C. Teng, T. Chang, E. Worley, K. Liao, Y. Yau, and G. Yeap. ISQED, page 87-91. IEEE, (2010)

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Disambiguation of "Yeap, Geoffrey"

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SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.

Please choose a person to relate this publication to

Dr. phil. Geoffrey Rodoreda University of Stuttgart

Dr. phil. Geoffrey Chanda University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Yeap, Geoffrey"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.

Please choose a person to relate this publication to

Dr. phil. Geoffrey Rodoreda University of Stuttgart

Dr. phil. Geoffrey Chanda University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.