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Boolean Functions Classification via Fixed Polarity Reed-Muller Forms., and . IEEE Trans. Computers, 46 (2): 173-186 (1997)Modeling Crosstalk in Resistive VLSI Interconnections., , , , and . VLSI Design, page 470-475. IEEE Computer Society, (1999)On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (2): 229-241 (2011)Timing-Aware Power-Noise Reduction in Placement., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (3): 527-541 (2007)Eliminating false positives in crosstalk noise analysis., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 24 (9): 1406-1419 (2005)Variation-aware electromigration analysis of power/ground networks., and . ICCAD, page 571-576. IEEE Computer Society, (2011)Modeling Crosstalk Induced Delay., and . ISQED, page 189-194. IEEE Computer Society, (2003)Minimizing Inter-Clock Coupling Jitter., , and . ISQED, page 333-338. IEEE Computer Society, (2003)Vertical Slit Field Effect Transistor in ultra-low power applications., , and . ISQED, page 384-390. IEEE, (2012)Delay Fault Diagnosis for Non-Robust Test., , , , and . ISQED, page 463-472. IEEE Computer Society, (2006)