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Ultra-Lightweight 548-1080 Gate 166Gbps/W-12.6Tbps/W SIMON 32/64 Cipher Accelerators for IoT in 14nm Tri-gate CMOS.

, , , , , , , and . A-SSCC, page 1-4. IEEE, (2018)

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A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS., , , and . VLSI Design, page 301-306. IEEE Computer Society, (2009)A 225-950mV 1.5Tbps/W Whirlpool Hashing Accelerator for Secure Automotive Platforms in 14nm CMOS., , , , , , , , and . CICC, page 1-4. IEEE, (2019)Ultra-low energy circuit building blocks for security technologies., , , and . DATE, page 391-394. IEEE, (2018)Optimized Fused Floating-Point Many-Term Dot-Product Hardware for Machine Learning Accelerators., , , , and . ARITH, page 84-87. IEEE, (2019)A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array., , , , , , , , , and 2 other author(s). VLSI Circuits, page 238-. IEEE, (2019)A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic Countermeasures., , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS., , , , , , , , , and 1 other author(s). ESSCIRC, page 116-119. IEEE, (2015)A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS., , , , , , , and . ESSCIRC, page 98-101. IEEE, (2018)A 2.05 GVertices/s 151 mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32 nm CMOS., , , , , , , and . IEEE J. Solid State Circuits, 48 (1): 128-139 (2013)53 Gbps Native GF(2 4) 2 Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors., , , , , , , , and . IEEE J. Solid State Circuits, 46 (4): 767-776 (2011)