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Disambiguation of "Yu, Shimeng"

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Compact oscillation neuron exploiting metal-insulator-transition for neuromorphic computing.

, , , and . ICCAD, page 15. ACM, (2016)

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Wei Yu University of Stuttgart

Yiwen Yuan University of Stuttgart

Xingyao Yu University of Stuttgart

Yu Li University of Stuttgart

Meral Yurdakul-Ziegler University of Stuttgart

 

Other publications of authors with the same name

Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication., , , , , , , , , and . J. Comput. Sci. Technol., 31 (1): 3-19 (2016)Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System., , and . IEEE Trans. VLSI Syst., 26 (7): 1290-1300 (2018)A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors., , , , , , , , , and . IEEE Trans. on Circuits and Systems, 66-I (11): 4172-4185 (2019)Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip., , , , , , , , , and . DATE, page 854-859. ACM, (2015)Analyzing inference robustness of RRAM synaptic array in low-precision neural network., , and . ESSDERC, page 18-21. IEEE, (2017)A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning., , , , , , , , , and 6 other author(s). ISSCC, page 396-398. IEEE, (2019)A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors., , , , , , , , , and 1 other author(s). ISSCC, page 496-498. IEEE, (2018)Thermal Reliability Considerations of Resistive Synaptic Devices for 3D CIM System Performance., , , , and . 3DIC, page 1-5. IEEE, (2021)RRAM based synaptic devices for neuromorphic visual systems., , , , , , , and . DSP, page 1219-1222. IEEE, (2015)Parallel Programming of Resistive Cross-point Array for Synaptic Plasticity., , , , , , , , , and . BICA, volume 41 of Procedia Computer Science, page 126-133. Elsevier, (2014)