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Disambiguation of "Mukhopadhyay, Saibal"

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Yield estimation of SRAM circuits using "Virtual SRAM Fab".

, , , , , , , , , , , and . ICCAD, page 631-636. ACM, (2009)

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Control Principles and On-Chip Circuits for Active Cooling Using Integrated Superlattice-Based Thin-Film Thermoelectric Devices., , , , , and . IEEE Trans. VLSI Syst., 22 (9): 1909-1919 (2014)A Dynamic Timing Error Prevention Technique in Pipelines With Time Borrowing and Clock Stretching., and . IEEE Trans. on Circuits and Systems, 61-I (1): 74-83 (2014)A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric., , , , and . IEEE Trans. on Circuits and Systems, 62-II (6): 593-597 (2015)Instruction-based energy estimation methodology for asymmetric manycore processor simulations., , , and . SimuTools, page 166-171. ICST/ACM, (2012)Variation-Aware Clock Network Design Methodology for Ultralow Voltage (ULV) Circuits., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (8): 1222-1234 (2012)Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies., , , and . ISCAS, page 384-387. IEEE, (2008)Postsilicon Adaptation for Low-Power SRAM under Process Variation., , , , and . IEEE Design & Test of Computers, 27 (6): 26-35 (2010)A power-aware digital feedforward neural network platform with backpropagation driven approximate synapses., , and . ISLPED, page 85-90. IEEE, (2015)On the Impact of Energy-Accuracy Tradeoff in a Digital Cellular Neural Network for Image Processing., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (7): 1070-1081 (2015)Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications., , , and . ASP-DAC, page 823-828. IEEE, (2009)