Author of the publication

Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications.

, , , and . ASP-DAC, page 823-828. IEEE, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

How to build a hardware description and measurement system on an object-oriented programming language.. IEEE Trans. on CAD of Integrated Circuits and Systems, 8 (3): 288-301 (1989)A framework for industrial layout generators., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 10 (5): 596-603 (1991)Hardware/software co-synthesis with memory hierarchies., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 18 (10): 1405-1417 (1999)A code decompression architecture for VLIW processors., , and . MICRO, page 66-75. ACM/IEEE Computer Society, (2001)An approach for computing the initial state for retimed synchronous sequential circuits., and . HLDVT, page 123-130. IEEE Computer Society, (2007)Timing-Driven State Assignment for Controller-Datapath Systems., and . Synthesis for Control Dominated Circuits, volume A-22 of IFIP Transactions, page 19-31. North-Holland, (1992)Experiments in logic optimization., and . ICCAD, page 286-289. IEEE, (1988)Embedded Hardware Face Detection., , , , and . VLSI Design, page 133-. IEEE Computer Society, (2004)Asymptotic Limits of Video Signal Processing Architectures., and . ICCD, page 622-625. IEEE Computer Society, (1994)Design Study of Shared Memory in VLIW Video Signal Processors., and . IEEE PACT, page 52-59. IEEE Computer Society, (1998)