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Disambiguation of "Chatterjee, Subho"

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A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric.

, , , , and . IEEE Trans. on Circuits and Systems, 62-II (6): 593-597 (2015)

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Swetaki Chatterjee University of Stuttgart

 

Other publications of authors with the same name

On the parametric failures of SRAM in a 3D-die stack considering tier-to-tier supply cross-talk., , , and . VTS, page 264-269. IEEE Computer Society, (2012)Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study., , , and . ISLPED, page 13-18. ACM, (2010)A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric., , , , and . IEEE Trans. on Circuits and Systems, 62-II (6): 593-597 (2015)An efficient approach to model distortion in weakly nonlinear Gm - C filters., , , and . ISCAS, page 1312-1315. IEEE, (2008)Electrothermal analysis of spin-transfer-torque random access memory arrays., , , and . JETC, 9 (2): 15:1-15:17 (2013)A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation., , and . VLSI Design, page 311-316. IEEE Computer Society, (2008)A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective., , , and . IEEE Trans. VLSI Syst., 19 (5): 809-817 (2011)Power Aware Post-manufacture Tuning of Analog Nanocircuits., , , and . European Test Symposium, page 57-62. IEEE Computer Society, (2011)Exploring Spin Transfer Torque Devices for Unconventional Computing., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (1): 5-16 (2015)A methodology for yield-specific leakage estimation in memory., , , , and . CICC, page 1-4. IEEE, (2014)