Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.

J. sun Seo, B. Brezzo, Y. Liu, B. Parker, S. Esser, R. Montoye, B. Rajendran, J. Tierno, L. Chang, D. Modha, and D. Friedman. CICC, page 1-4. IEEE, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

D. Marino

Benjamin Bätz University of Stuttgart

D. Roth

D. Inkermann

D. Roth

Other publications of authors with the same name

A semi-digital delay-locked loop using an analog-based finite state machine.W. Rhee, B. Parker, and D. Friedman. IEEE Trans. on Circuits and Systems, 51-II (11): 635-639 (2004)A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS.J. Bulzacchelli, T. Dickson, Z. Deniz, H. Ainspan, B. Parker, M. Beakes, S. Rylov, and D. Friedman. ISSCC, page 368-369. IEEE, (2009)The Biomolecular Interaction Network Database and related tools 2005 update.C. Alfarano, C. Andrade, K. Anthony, N. Bahroos, M. Bajec, K. Bantoft, D. Betel, B. Bobechko, K. Boutilier, E. Burgess and 65 other author(s). Nucleic Acids Research, 33 (Database-Issue): 418-424 (2005)A High-Resolution Minimicroscope System for Wireless Real-Time Monitoring.Z. Wang, A. Boddeda, B. Parker, R. Samanipour, S. Ghosh, F. Menard, and K. Kim. IEEE Trans. Biomed. Engineering, 65 (7): 1524-1531 (2018)A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation.S. Asaad, R. Bellofatto, B. Brezzo, C. Haymes, M. Kapur, B. Parker, T. Roewer, P. Saha, T. Takken, and J. Tierno. FPGA, page 153-162. ACM, (2012)22.1 A 25Gb/s burst-mode receiver for rapidly reconfigurable optical networks.A. Rylyakov, J. Proesel, S. Rylov, B. Lee, J. Bulzacchelli, A. Ardey, B. Parker, M. Beakes, C. Baks, C. Schow and 1 other author(s). ISSCC, page 1-3. IEEE, (2015)3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI.S. Rylov, T. Beukema, Z. Deniz, T. Toifl, Y. Liu, A. Agrawal, P. Buchmann, A. Rylyakov, M. Beakes, B. Parker and 1 other author(s). ISSCC, page 56-57. IEEE, (2016)Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion.S. Sun, F. Wang, S. Yaldiz, X. Li, L. Pileggi, A. Natarajan, M. Ferriss, J. Plouchart, B. Sadhu, B. Parker and 4 other author(s). CICC, page 1-4. IEEE, (2013)Adaptive Circuit Design Methodology and Test Applied to Millimeter-Wave Circuits.J. Plouchart, F. Wang, X. Li, B. Parker, M. Sanduleanu, A. Balteanu, B. Sadhu, A. Valdes-Garcia, and D. Friedman. IEEE Design & Test, 31 (6): 8-18 (2014)A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS.J. Plouchart, M. Ferriss, A. Natarajan, A. Valdes-Garcia, B. Sadhu, A. Rylyakov, B. Parker, M. Beakes, A. Babakhani, S. Yaldiz and 5 other author(s). IEEE Trans. on Circuits and Systems, 60-I (8): 2009-2017 (2013)

PUMA

Disambiguation of "Parker, Benjamin D."

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.

Please choose a person to relate this publication to

D. Marino

Benjamin Bätz University of Stuttgart

D. Roth

D. Inkermann

D. Roth

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Parker, Benjamin D."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.

Please choose a person to relate this publication to

D. Marino

Benjamin Bätz University of Stuttgart

D. Roth

D. Inkermann

D. Roth

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.