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Disambiguation of "Reis, Ricardo"

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Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing.

, , , and . SBCCI, page 220-225. ACM, (2006)

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Dr. Pascal Fabian Reisert University of Stuttgart

Dr. Ellen Reister University of Stuttgart

Rodolfo Reis Soldati University of Stuttgart

Dr. -Ing. Martin Reiser University of Stuttgart

Stefanie Reisinger University of Stuttgart

 

Other publications of authors with the same name

Statistical and Numerical Approach for a Computer efficient circuit yield analysis., , , and . VLSI-SoC (Selected Papers), volume 291 of IFIP, page 1-24. Springer, (2007)Logic and Physical Synthesis of Cell Arrays., , and . ICECS, page 1292-1295. IEEE, (2007)An Educational Tool for Design Automation of CMOS Cells., , and . MSE, page 149-150. IEEE Computer Society, (2007)A CAL Tool to Aid the Understanding of Logic Synthesis., , and . MSE, page 49-50. IEEE Computer Society, (2007)Design of Very Deep Pipelined Multipliers for FPGAs., , , , , and . DATE, page 52-57. IEEE Computer Society, (2004)Design of a Robust 8-Bit Microprocessor to Soft Errors., , and . IOLTS, page 195-196. IEEE Computer Society, (2006)Exploiting memory allocations in clusterised many-core architectures., , , , , and . IET Computers & Digital Techniques, 13 (4): 302-311 (2019)A New Nonlinear Global Placement for FPGAs: The Chaotic Place., , and . IEEE Trans. on Circuits and Systems, 66-I (6): 2165-2174 (2019)Design Tools and Methods for Chip Physical Design.. Multiprocessor System-on-Chip, Springer, (2011)Path planning aware of soil compaction for steep slope vineyards., , , , , , and . ICARSC, page 250-255. IEEE, (2018)