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Disambiguation of "Brusamarello, Lucas"

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Statistical and Numerical Approach for a Computer efficient circuit yield analysis.

, , , and . VLSI-SoC (Selected Papers), volume 291 of IFIP, page 1-24. Springer, (2007)

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Lucas Lavoine University of Stuttgart

Lucas Möller University of Stuttgart

Lucas Haug University of Stuttgart

Lucas Vieira Pupim University of Stuttgart

 

Other publications of authors with the same name

Statistical RTS model for digital circuits., , and . Microelectronics Reliability, 49 (9-11): 1064-1069 (2009)Técnicas probabilísticas para análise de yield em nível elétrico usando propagação de erros e derivadas numéricas., , , and . RITA, 14 (2): 69-89 (2007)Compact modeling and simulation of Random Telegraph Noise under non-stationary conditions in the presence of random dopants., , , , , and . Microelectronics Reliability, 52 (12): 2955-2961 (2012)Statistical and Numerical Approach for a Computer efficient circuit yield analysis., , , and . VLSI-SoC (Selected Papers), volume 291 of IFIP, page 1-24. Springer, (2007)Modeling and simulation of device variability and reliability at the electrical level.. Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil, (2011)ndltd.org (oai:lume56.ufrgs.br:10183/65634).Fast and accurate statistical characterization of standard cell libraries., , , and . Microelectronics Reliability, 51 (12): 2341-2350 (2011)Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level., , , and . VLSI-SoC, page 94-98. IEEE, (2007)Statistical characterization of standard cells using design of experiments with response surface modeling., , , and . DAC, page 77-82. ACM, (2011)Yield Analysis by Error Propagation Using Numerical Derivatives Considering WD and D2D variations., , , and . ISVLSI, page 86-91. IEEE Computer Society, (2007)Probabilistic Approach for Yield Analysis of Dynamic Logic Circuits., , , and . IEEE Trans. on Circuits and Systems, 55-I (8): 2238-2248 (2008)