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Disambiguation of "Gherman, Valentin"

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Memory Reliability Improvement Based on Maximized Error-Correcting Codes.

, , and . J. Electronic Testing, 29 (4): 601-608 (2013)

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Valentin Leipe University of Stuttgart

Valentin Kamm University of Stuttgart

Valentin Wagner University of Stuttgart

Valentin Bayer University of Stuttgart

Valentin Honold University of Stuttgart

 

Other publications of authors with the same name

Error-correction schemes with erasure information for fast memories., and . ETS, page 1-6. IEEE Computer Society, (2013)Efficient Pattern Mapping for Deterministic Logic BIST., , , , , and . ITC, page 48-56. IEEE Computer Society, (2004)Deterministic logic BIST for transition fault testing., , , and . IET Computers & Digital Techniques, 1 (3): 180-186 (2007)Implementing a Scheme for External Deterministic Self-Test., , , , and . VTS, page 101-106. IEEE Computer Society, (2005)Generalized parity-check matrices for SEC-DED codes with fixed parity., , , and . IOLTS, page 198-201. IEEE Computer Society, (2011)Flip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths., , , , and . IOLTS, page 160-163. IEEE, (2014)Is aproximate computing suitable for selective hardening of arithmetic circuits?, , , , and . DTIS, page 1-6. IEEE, (2018)Error prediction based on concurrent self-test and reduced slack time., , , , and . DATE, page 1626-1631. IEEE, (2011)System-level hardware-based protection of memories against soft-errors., , , , and . DATE, page 1222-1225. IEEE, (2009)Shadow-scan design with low latency overhead and in-situ slack-time monitoring., , , , , , and . ETS, page 1-6. IEEE, (2014)