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Disambiguation of "Lim, Sung Kyu"

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Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory).

, , , , , , , , , , , , , , , , , , , , , , and . IEEE Trans. Computers, 64 (1): 112-125 (2015)

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Jaekeun Lim University of Stuttgart

 

Other publications of authors with the same name

Backend Dielectric Reliability Full Chip Simulator., , , , and . IEEE Trans. VLSI Syst., 22 (8): 1750-1762 (2014)Distributed TSV Topology for 3-D Power-Supply Networks., and . IEEE Trans. VLSI Syst., 20 (11): 2066-2079 (2012)Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing., , and . IEEE Trans. on Circuits and Systems, 56-II (7): 565-569 (2009)Impact of nano-scale through-silicon vias on the quality of today and future 3D IC designs., , and . SLIP, page 1-8. IEEE, (2011)Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools - Part 2., and . IEEE Design & Test, 33 (2): 7-8 (2016)Retiming-based timing analysis with an application to mincut-based global placement., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (12): 1684-1692 (2004)Edge separability-based circuit clustering with application to multilevel circuit partitioning., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (3): 346-357 (2004)Exploration of temperature-aware refresh schemes for 3D stacked eDRAM caches., , , and . Microprocessors and Microsystems - Embedded Hardware Design, (2016)A unified methodology for power supply noise reduction in modern microarchitecture design., , , and . ASP-DAC, page 611-616. IEEE, (2008)An Efficient Computation of Statistically Critical Sequential Paths Under Retiming., , and . ASP-DAC, page 547-552. IEEE Computer Society, (2007)