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Disambiguation of "Pathak, Mohit"

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Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory).

, , , , , , , , , , , , , , , , , , , , , , and . IEEE Trans. Computers, 64 (1): 112-125 (2015)

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Raghav Pathak University of Stuttgart

 

Other publications of authors with the same name

Design for manufacturability and reliability for TSV-based 3D ICs., , , , , , , and . ASP-DAC, page 750-755. IEEE, (2012)Net and Pin Distribution for 3D Package Global Routing., , and . DATE, page 1410-1411. IEEE Computer Society, (2004)Thermal-aware Steiner routing for 3D stacked ICs., and . ICCAD, page 205-211. IEEE Computer Society, (2007)Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory., , , , , , , , , and 9 other author(s). CICC, page 1-4. IEEE, (2010)Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs., , , and . ICCAD, page 555-562. IEEE Computer Society, (2011)Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (9): 1373-1386 (2009)Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)., , , , , , , , , and 13 other author(s). IEEE Trans. Computers, 64 (1): 112-125 (2015)Exploiting die-to-die thermal coupling in 3D IC placement., , and . DAC, page 741-746. ACM, (2012)Placement and routing of RF embedded passive designs in LCP substrate., , , , and . ICCD, page 273-279. IEEE, (2007)Through-silicon-via management during 3D physical design: When to add and how many?, , , and . ICCAD, page 387-394. IEEE, (2010)