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Disambiguation of "Lim, Sung Kyu"

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Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs.

, , , and . ICCAD, page 555-562. IEEE Computer Society, (2011)

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Jaekeun Lim University of Stuttgart

Sung-Min Wi University of Stuttgart

 

Other publications of authors with the same name

TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3-D IC., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (8): 1194-1207 (2012)Multi-TSV and E-Field Sharing Aware Full-chip Extraction and Mitigation of TSV-to-Wire Coupling., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (12): 1964-1976 (2015)Backend Dielectric Reliability Full Chip Simulator., , , , and . IEEE Trans. VLSI Syst., 22 (8): 1750-1762 (2014)Distributed TSV Topology for 3-D Power-Supply Networks., and . IEEE Trans. VLSI Syst., 20 (11): 2066-2079 (2012)Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing., , and . IEEE Trans. on Circuits and Systems, 56-II (7): 565-569 (2009)Fast delay estimation with buffer insertion for through-silicon-via-based 3D interconnects., and . ISQED, page 228-335. IEEE, (2012)Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools - Part 2., and . IEEE Design & Test, 33 (2): 7-8 (2016)Retiming-based timing analysis with an application to mincut-based global placement., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (12): 1684-1692 (2004)Edge separability-based circuit clustering with application to multilevel circuit partitioning., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (3): 346-357 (2004)A unified methodology for power supply noise reduction in modern microarchitecture design., , , and . ASP-DAC, page 611-616. IEEE, (2008)