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Disambiguation of "Lim, Sung Kyu"

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Impact of nano-scale through-silicon vias on the quality of today and future 3D IC designs.

, , and . SLIP, page 1-8. IEEE, (2011)

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Jaekeun Lim University of Stuttgart

Sung-Min Wi University of Stuttgart

 

Other publications of authors with the same name

Methodology to determine the impact of linewidth variation on chip scale copper/low-k backend dielectric breakdown., , , and . Microelectronics Reliability, 50 (9-11): 1341-1346 (2010)Impact of irregular geometries on low-k dielectric breakdown., , , and . Microelectronics Reliability, 51 (9-11): 1582-1586 (2011)Scan Test of Die Logic in 3-D ICs Using TSV Probing., , , and . IEEE Trans. VLSI Syst., 23 (2): 317-330 (2015)Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (4): 540-553 (2015)Profile-Driven Instruction Mapping for Dataflow Architectures., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (12): 3017-3025 (2006)Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3-D ICs., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (11): 1635-1648 (2011)Reliability-aware floorplanning for 3D circuits., , and . SoCC, page 81-82. IEEE, (2005)Design Quality Trade-Off Studies for 3-D ICs Built With Sub-Micron TSVs and Future Devices., and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 240-248 (2012)Full-Chip Power/Performance Benefits of Carbon Nanotube-Based Circuits., and . J. Inform. and Commun. Convergence Engineering, (2015)Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV model., , , , , and . ASP-DAC, page 693-698. IEEE, (2013)