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A Simulator of Small-Delay Faults Caused by Resistive-Open Defects.

, , , , , , and . European Test Symposium, page 113-118. IEEE Computer Society, (2008)

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Guest Editorial., , and . J. Electronic Testing, 21 (3): 203 (2005)A New FPGA for DSP Applications Integrating BIST Capabilities., , , and . J. Electronic Testing, 20 (4): 423-431 (2004)Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC., , , , , and . IET Computers & Digital Techniques, 1 (3): 146-153 (2007)New implementions of predictive alternate analog/RF test with augmented model redundancy., , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Testing for gate oxide short defects using the detectability interval paradigm., , , and . it - Information Technology, 56 (4): 173-181 (2014)Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing., , , , , and . LATW, page 1-6. IEEE, (2014)TI-BIST: a temperature independent analog BIST for switched-capacitor filters., , , , , and . Asian Test Symposium, page 78-83. IEEE Computer Society, (2000)Test configurations to enhance the testability of sequential circuits., , , and . Asian Test Symposium, page 160-168. IEEE Computer Society, (1995)Smart selection of indirect parameters for DC-based alternate RF IC testing., , , , , , , and . VTS, page 19-24. IEEE Computer Society, (2012)Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies., , , , , and . VTS, page 343-348. IEEE Computer Society, (2005)