Author of the publication

pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.

J. Ihm, S. Bae, K. Park, H. Song, W. Lee, H. Kim, K. Kim, H. Lee, M. Park, S. Bang, M. Lee, G. Moon, Y. Jang, S. Hwang, Y. Cho, S. Hwang, D. Kim, J. Lim, J. Kim, S. Park, O. Park, S. Yang, J. Choi, Y. Kim, H. Lee, S. Kim, S. Jang, Y. Jun, and S. Cho. ISSCC, page 492-617. IEEE, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Laura-Ann Dönges University of Stuttgart

Esra Dönmez University of Stuttgart

Rainer Donandt University of Stuttgart

Moon Kwang Jeong University of Stuttgart

Moon Young Jeong University of Stuttgart

Other publications of authors with the same name

7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate.J. Im, W. Jeong, D. Kim, S. Nam, D. Shim, M. Choi, H. Yoon, D. Kim, Y. Kim, H. Park and 24 other author(s). ISSCC, page 1-3. IEEE, (2015)PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion.Y. Park, S. Lee, B. Kong, K. Park, J. Ihm, J. Choi, and Y. Jun. ISCAS, page 1902-1905. IEEE, (2008)An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion.S. Bae, K. Park, J. Ihm, H. Song, W. Lee, H. Kim, K. Kim, Y. Park, M. Park, H. Lee and 14 other author(s). J. Solid-State Circuits, 43 (1): 121-131 (2008)11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory.C. Kim, J. Cho, W. Jeong, I. Park, H. Park, D. Kim, D. Kang, S. Lee, J. Lee, W. Kim and 34 other author(s). ISSCC, page 202-203. IEEE, (2017)A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate.W. Jeong, J. Im, D. Kim, S. Nam, D. Shim, M. Choi, H. Yoon, D. Kim, Y. Kim, H. Park and 19 other author(s). J. Solid-State Circuits, 51 (1): 204-212 (2016)7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers.D. Kang, W. Jeong, C. Kim, D. Kim, Y. Cho, K. Kang, J. Ryu, K. Kang, S. Lee, W. Kim and 20 other author(s). ISSCC, page 130-131. IEEE, (2016)256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers.D. Kang, W. Jeong, C. Kim, D. Kim, Y. Cho, K. Kang, J. Ryu, K. Kang, S. Lee, W. Kim and 19 other author(s). J. Solid-State Circuits, 52 (1): 210-217 (2017)A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface.D. Kang, M. Kim, S. Jeon, W. Jung, J. Park, G. Choo, D. Shim, A. Kavala, S. Kim, K. Kang and 39 other author(s). ISSCC, page 216-218. IEEE, (2019)7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate.S. Lee, J. Lee, I. Park, J. Park, S. Yun, M. Kim, J. Lee, M. Kim, K. Lee, T. Kim and 35 other author(s). ISSCC, page 138-139. IEEE, (2016)An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.J. Ihm, S. Bae, K. Park, H. Song, W. Lee, H. Kim, K. Kim, H. Lee, M. Park, S. Bang and 19 other author(s). ISSCC, page 492-617. IEEE, (2007)

PUMA

Disambiguation of "Ihm, Jeong-Don"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.

Please choose a person to relate this publication to

Laura-Ann Dönges University of Stuttgart

Esra Dönmez University of Stuttgart

Rainer Donandt University of Stuttgart

Moon Kwang Jeong University of Stuttgart

Moon Young Jeong University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Ihm, Jeong-Don"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.

Please choose a person to relate this publication to

Laura-Ann Dönges University of Stuttgart

Esra Dönmez University of Stuttgart

Rainer Donandt University of Stuttgart

Moon Kwang Jeong University of Stuttgart

Moon Young Jeong University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.