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An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems., , , and . IEEE Trans. Computers, 44 (11): 1306-1317 (1995)Algorithms for Gate Sizing and Device Parameter Selection for High-Performance Designs., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (10): 1558-1571 (2012)Trace alignment algorithms for offline workload analysis of heterogeneous architectures., , , , and . ICCAD, page 654-661. IEEE, (2013)Energy Efficient Architecture for Graph Analytics Accelerators., , , , , , and . ISCA, page 166-177. IEEE Computer Society, (2016)Comparative Analysis of Conventional and Statistical Design Techniques., , , , , and . DAC, page 238-243. IEEE, (2007)The ISPD-2012 discrete cell sizing contest and benchmark suite., , , , , and . ISPD, page 161-164. ACM, (2012)Practical applications of an efficient time separation of events algorithm., , , and . ICCAD, page 146-151. IEEE Computer Society / ACM, (1993)Bounded Delay Timing Analysis of a Class of CSP Programs., and . Formal Methods in System Design, 11 (3): 265-294 (1997)Synthesis of asynchronous control circuits with automatically generated relative timing assumptions., , , and . ICCAD, page 324-331. IEEE Computer Society, (1999)Gate sizing and device technology selection algorithms for high-performance industrial designs., , and . ICCAD, page 724-731. IEEE Computer Society, (2011)