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An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems.

, , , and . IEEE Trans. Computers, 44 (11): 1306-1317 (1995)

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Testing asynchronous circuits: A survey., , and . Integration, 19 (3): 111-131 (1995)Verification of Large State/Event Systems Using Compositionality and Dependency Analysis., , , , , and . TACAS, volume 1384 of Lecture Notes in Computer Science, page 201-216. Springer, (1998)Boolean Expression Diagrams., and . Inf. Comput., 179 (2): 194-212 (2002)Symbolic model checking of timed guarded commands using difference decision diagrams., , and . J. Log. Algebr. Program., (2002)Equivalence checking of combinational circuits using Boolean expression diagrams., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 18 (7): 903-917 (1999)Symbolic timing analysis of asynchronous systems., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 19 (10): 1093-1104 (2000)Bounded delay timing analysis of a class of CSP programs with choice., and . ASYNC, page 2-11. IEEE, (1994)Verification of Hierarchical State/Event Systems Using Reusability and Compositionality., , , , and . TACAS, volume 1579 of Lecture Notes in Computer Science, page 163-177. Springer, (1999)An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems., , , and . ICCD, page 166-173. IEEE Computer Society, (1993)Difference Decision Diagrams., , , and . CSL, volume 1683 of Lecture Notes in Computer Science, page 111-125. Springer, (1999)