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Disambiguation of "Ketkar, Mahesh"

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Comparative Analysis of Conventional and Statistical Design Techniques.

, , , , , and . DAC, page 238-243. IEEE, (2007)

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Other publications of authors with the same name

Gate Sizing for Cell-Library-Based Designs., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (6): 818-825 (2009)Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs., , , , and . ISQED, page 389-394. IEEE, (2020)PerfProbe: a systematic, cross-layer performance diagnosis framework for mobile platforms., , , , and . MOBILESoft@ICSE, page 50-61. IEEE / ACM, (2019)A microarchitecture-based framework for pre- and post-silicon power delivery analysis., and . MICRO, page 179-188. ACM, (2009)A new class of convex functions for delay modeling and itsapplication to the transistor sizing problem CMOS gates., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 19 (7): 779-788 (2000)Standby power optimization via transistor sizing and dual threshold voltage assignment., and . ICCAD, page 375-378. ACM / IEEE Computer Society, (2002)Comparative Analysis of Conventional and Statistical Design Techniques., , , , , and . DAC, page 238-243. IEEE, (2007)Gate Sizing For Cell Library-Based Designs., , and . DAC, page 847-852. IEEE, (2007)Convex delay models for transistor sizing., , and . DAC, page 655-660. ACM, (2000)Mining Message Flows from System-on-Chip Execution Traces., , , , and . ISQED, page 374-380. IEEE, (2021)