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Energy Efficient Architecture for Graph Analytics Accelerators.

, , , , , , and . ISCA, page 166-177. IEEE Computer Society, (2016)

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Other publications of authors with the same name

Architectural Requirements for Energy Efficient Execution of Graph Analytics Applications., , , , , and . ICCAD, page 676-681. IEEE, (2015)Hardware Accelerator Design for Data Centers., , , , , and . ICCAD, page 770-775. IEEE, (2015)A Polyhedral-based SystemC Modeling and Generation Framework for Effective Low-power Design Space Exploration., , , , , , , and . ICCAD, page 357-364. IEEE, (2015)An improved benchmark suite for the ISPD-2013 discrete cell sizing contest., , , , , and . ISPD, page 168-170. ACM, (2013)A trace compression algorithm targeting power estimation of long benchmarks., and . ICCAD, page 702-707. IEEE Computer Society, (2011)An analytical approach to placement legalization., , and . ACM Great Lakes Symposium on VLSI, page 167-170. ACM, (2008)A novel timing-driven placement algorithm using smooth timing analysis., and . EWDTS, page 137-140. IEEE Computer Society, (2008)Energy Efficient Architecture for Graph Analytics Accelerators., , , , , , and . ISCA, page 166-177. IEEE Computer Society, (2016)Accurate High-level Modeling and Automated Hardware/Software Co-design for Effective SoC Design Space Exploration., , , , , , and . DAC, page 78:1-78:6. ACM, (2017)The ISPD-2012 discrete cell sizing contest and benchmark suite., , , , , and . ISPD, page 161-164. ACM, (2012)