Author of the publication

A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks.

, , and . FPT, page 313-316. IEEE, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Applying Dynamic Reconfiguration for Fault Tolerance in Fine-Grained Logic Arrays.. IEEE Trans. VLSI Syst., 16 (2): 134-143 (2008)Selected Papers from ReCoSoC 2008., , , and . Int. J. Reconfig. Comp., (2009)Coarse-grained reconfiguration., , , , , , , , , and 4 other author(s). FPL, page 349. IEEE, (2008)Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing., , , , , , , and . Conf. Computing Frontiers, page 404-418. ACM, (2004)Reconfigurable platforms for ubiquitous computing., , , , , , , and . Conf. Computing Frontiers, page 377-389. ACM, (2004)A scalable reconfiguration mechanism for fast dynamic reconfiguration., , and . FPT, page 145-152. IEEE, (2008)A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks., , and . FPT, page 313-316. IEEE, (2007)Pipelined reconfigurable multiplication with constants on FPGAs., , , and . FPL, page 1-6. IEEE, (2014)An FPGA-optimized architecture of horn and schunck optical flow algorithm for real-time applications., , and . FPL, page 1-4. IEEE, (2014)FIR filter optimization for video processing on FPGAs., , , , and . EURASIP J. Adv. Sig. Proc., (2013)