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Disambiguation of "Becker, Jürgen"

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Coarse-grained reconfiguration.

, , , , , , , , , , , , , and . FPL, page 349. IEEE, (2008)

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apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

Advances in Avionic Platforms: Multi-core Systems., and . Advances in Aeronautical Informatics, Springer, (2018)Power and performance optimization through MPI supported dynamic voltage and frequency scaling., , , , and . MARC Symposium, page 75-78. KIT Scientific Publishing, Karlsruhe, (2011)New Adaptive Multi-grained Hardware Architecture for Processing of Dynamic Function Patterns (Neue adaptive multi-granulare Hardwarearchitektur)., and . it - Information Technology, 49 (3): 165- (2007)Providing fault tolerance through invasive computing., , , , , , , , and . it - Information Technology, 58 (6): 309-328 (2016)Synthese von Kommunikationsstrukturen und architekturgenaues Rapid-Prototyping eingebetteter Echtzeitsysteme (Communication Synthesis and Architecture-Precise Rapid Prototyping of Embedded systems with Hard Real-Time Constraints)., , , and . it+ti - Informationstechnik und Technische Informatik, 42 (2): 27-33 (2000)Configware and morphware going mainstream., and . Journal of Systems Architecture, 49 (4-6): 127-142 (2003)10281 Abstracts Collection - Dynamically Reconfigurable Architectures., , , and . Dynamically Reconfigurable Architectures, volume 10281 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2010)A Secure Framework with Remote Configuration of Intellectual Property., , and . ICISSP, page 564-571. SciTePress, (2019)A Novel Recursive Algorithm for Bit-Efficient Realization of Arbitrary Length Inverse Modified Cosine Transforms., , and . DATE, page 604-609. ACM, (2008)Novel Seamless Design-Flow for Partial and Dynamic Reconfigurable Systems with Customized Communication Structures based on Xilinx Virtex-II FPGAs., , , and . ARCS Workshops, page 39-44. VDE Verlag, (2005)