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Disambiguation of "Bansal, Aditya"

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Pre-Si estimation and compensation of SRAM layout deficiencies to achieve target performance and yield.

, , , , , and . ICCD, page 457-462. IEEE Computer Society, (2008)

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Aditya Chaudhary University of Stuttgart

 

Other publications of authors with the same name

Circuit-aware device design methodology for nanometer technologies: a case study for low power SRAM design., , , and . DATE, page 983-988. European Design and Automation Association, Leuven, Belgium, (2006)Double-gate SOI devices for low-power and high-performance applications., , , , , and . ICCAD, page 217-224. IEEE Computer Society, (2005)Yield estimation of SRAM circuits using "Virtual SRAM Fab"., , , , , , , , , and 2 other author(s). ICCAD, page 631-636. ACM, (2009)Covariance computation in MHE: A nonlinear regression approach., , and . ICCA, page 663-668. IEEE, (2016)FinFET SRAM - Device and Circuit Design Considerations., , and . ISQED, page 511-516. IEEE Computer Society, (2004)FinFET SRAM: Optimizing Silicon Fin Thickness and Fin Ratio to Improve Stability at iso Area., , and . CICC, page 623-626. IEEE, (2007)Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies., , , , , and . VLSI Design, page 125-130. IEEE Computer Society, (2008)High Performance and Low Power Electronics on Flexible Substrate., , , and . DAC, page 274-275. IEEE, (2007)Modeling and optimization approach to robust and low-power FinFET SRAM design in nanoscale era., , and . CICC, page 835-838. IEEE, (2005)Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology., , , , , and . ASP-DAC, page 237-242. IEEE, (2006)