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Smart selection of indirect parameters for DC-based alternate RF IC testing., , , , , , , and . VTS, page 19-24. IEEE Computer Society, (2012)Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies., , , , , and . VTS, page 343-348. IEEE Computer Society, (2005)Hardware Resource Minimization for Histogram-Based ADC BIST., , , and . VTS, page 247-254. IEEE Computer Society, (2000)New implementions of predictive alternate analog/RF test with augmented model redundancy., , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)TI-BIST: a temperature independent analog BIST for switched-capacitor filters., , , , , and . Asian Test Symposium, page 78-83. IEEE Computer Society, (2000)Test configurations to enhance the testability of sequential circuits., , , and . Asian Test Symposium, page 160-168. IEEE Computer Society, (1995)Optimal conditions for Boolean and current detection of floating gate faults., , , , and . ITC, page 477-486. IEEE Computer Society, (1999)Different experiments in test generation for XILINX FPGAs., and . ITC, page 854-862. IEEE Computer Society, (2000)Änalogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC., , , , , and . European Test Symposium, page 159-164. IEEE Computer Society, (2006)A Specific Test Methodology for Symmetric SRAM-Based FPGAs.. FPL, volume 1896 of Lecture Notes in Computer Science, page 300-311. Springer, (2000)