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Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs.

, , , , , , , and . DATE, page 538. IEEE Computer Society, (2002)

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Design Methodology Innovations Address Manufacturing Technology Challenges: Power and Performance.. DSD, page 52-59. IEEE Computer Society, (2004)The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (12): 2209-2222 (2008)Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs., , , , , , , and . DATE, page 538. IEEE Computer Society, (2002)Goal oriented slicing enumeration through shape function clipping., and . EURO-DAC, page 361-365. EEE Computer Society, (1991)EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration Under Process Variations., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (4): 705-718 (2019)Reliability-Aware Synthesis With Dynamic Device Mapping and Fluid Routing for Flow-Based Microfluidic Biochips., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (12): 1981-1994 (2016)PROTON+: A Placement and Routing Tool for 3D Optical Networks-on-Chip with a Single Optical Layer., , , and . JETC, 12 (4): 44:1-44:28 (2016)Efficient spanning-tree-based test pattern generation for Programmable Microfluidic Devices., , , and . Microelectronics Journal, (2018)On-Chip Electric Waves: An Analog Circuit Approach to Physical Uncloneable Functions., , , , , , , and . IACR Cryptology ePrint Archive, (2009)Fault Localization in Programmable Microfluidic Devices., , , and . DATE, page 1607-1610. IEEE, (2019)